Integrating Static Timing Analysis into your Layout for a Constraint Driven Design Flow

As PCB designs become more complex and high speed, achieving correct circuit timing is crucial to creating a reliable design. Designers no longer have the luxury of creating multiple re-spins of their designs due to strict time-to-market deadlines and supply chain challenges. This means it is essential to model your critical timing paths as early as possible and throughout the design process.

Join us to learn how to streamline your timing analysis in a seamless flow by experimenting and establishing timing and PCB constraints in real-time.

What you will learn:

  • How to leverage timing constraints at the schematic level
  • How to create waveform protocols associated with each device where timing is critical
  • Establish and experiment with the signal delays to determine any critical timing constraints necessary for proper target device function.
  • Why constraint-driven placement in the layout phase is essential to a correct-by-design methodology. 
Integrating Static Timing Analysis into your Layout
May 26th, 2022 @ 10:00 AM ET
May 26th, 2022 @ 2:00 PM ET

About your Presenter

Jerry Long

Jerry Long is a Senior Applications Engineer for EMA Design Automation. With a bachelor’s degree in electrical engineering from the University of Texas at Austin, he provides high-end customer support for several Cadence products and has been involved in several product lines involving verification, simulation, and timing analysis.

Copyright EMA Design Automation, Inc