Common Challenges when Designing IoT PCBs – And How to Solve Them with Cadence

While IoT devices may seem simple to the end users (which is good), the electrical design complexity of these devices is often very high. Designers are required to work with limited board space while functionality and speed requirements continue to increase. These tight spaces, combined with the required highspeed signaling, leads to increased susceptibility to SI/PI/EMI/RF issues. This makes time-to-market, cost, and manufacturing requirements a significant challenge to meet. While these challenges are not going to get any easier, there are solutions that enable designers to confidently deliver these complex products on-time and on budget. Learn from the experts at Cadence and EMA how the Intelligent System Design platform at the heart of the Cadence PCB flow enables teams to concurrently manage and overcome these challenges early in the design process, optimize the design, and verify functionality for first pass success. 

What you will learn:

  • How to prevent component availability, compliance, cost, and reliability issues upfront
  • How to manage your design inside tight form factors
  • How quickly and effectively route high speed signals within tight spaces
  • How define and ensure your DFM and high speed design requirements will be met
  • How to incorporate and shield RF elements into your connected design
  • How to do all this within a single design platform across design, analysis, mechanical integration, and DFM
Common Challenges when Designing IoT PCBs – And How to Solve Them with Cadence
September 29th, 2021
2:00 PM ET

About your Presenters

Patrick Davis

Patrick Davis is the Product Management Director for Allegro at Cadence Design Systems.  He is an industry expert with over 25 years’ experience in the PCB design industry.  Staring his career as a PCB designer and working his way up to Sr. Vice President of Design before pivoting to his new exciting role at Cadence Design Systems where he gets influence what the next generation of EDA tools will be. 

Matthew Harms

Matthew Harms is an Electrical Engineer from Canada and has been with EMA as an Application Engineer since 2003 and as the Application Engineer Team Leader since 2018. At EMA, he specializes in design side issues pertaining to part management, circuit simulation, signal integrity and power integrity but is conversant in all facets of ECAD design. 

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