Webinar

6 Common SI/PI Issues Lurking in Your Design – And How to Prevent Them 

Electronics have been speeding up for decades, and there is no sign that it will be slowing down in the future. As the need for faster, more power efficient, and smaller devices continue to grow signal and power integrity issues are becoming commonplace. Fortunately, many of these issues are addressable once understood and can be identified and corrected early in the design process to avoid schedule delays and stressful debugging sessions in the lab. 

Join us as we explore these common problems hiding in many of today’s designs and get tips and insights from the experts on how to resolve your SI/PI issue before they happen. 

What you will learn:

• What impacts characteristic impedance, common sources of errors, and how to fix them.
• Problems that cause DC voltage drop and tips to avoid this issue.
• What crosstalk is and how to minimize inductive and capacitive coupling between traces. 
• Why non-ideal return paths must be minimized and how to do so.
• How to prevent package parasitic's from sneaking up on you 
• Importance of decoupling capacitor selection and placement to minimize loop inductance
• How you can find and fix these issues quickly with new in-design analysis methodologies
  

Who Should Attend:

• Designers & Engineers looking to reduce cycles and prevent design issues before they happen
• Engineering Managers and Team Leaders who need to delivery reliable products on schedule predictably
• SI / PI Engineers interested in learning about new in-design methods the whole design team can use to find, fix, and prevent issues before sign-off or prototype